Gallium nitride (GaN) and aluminum nitride (AlN) have (hitherto) been known as Group III nitride semiconductors. These Group III nitride semiconductor materials are used to form semiconductor light emitting devices, such as light emitting diodes (hereinafter abbreviated as “LEDs”), which emit blue, green or otherwise visible light of short wavelength, and laser diodes (hereinafter abbreviated as “LDs”) (refer to, for example, JP-A SHO 55-3834 (Patent Document 1)). Also, these Group III nitride semiconductor materials are used to form electronic devices such as high-frequency transistors (refer to, for example, M. A. Kahn et al., Applied Physics Letters (Appl. Phys. Lett.), USA, 1993, Vol. 62, p. 1786 (Non-patent Document 1)).
In such semiconductor devices composed of Group III nitride semiconductor materials, a sapphire (α-Al2O3) bulk single crystal (refer to, for example, JP-A HEI 6-151943 (Patent Document 2) or a cubic silicon carbide (SiC) bulk single crystal (refer to, for example, JP-A HEI 6-326416 (Patent Document 3)) is used as a substrate. LEDs have been manufactured by using, for example, a stacked structure having a cladding layer composed of a Group III nitride semiconductor material, and a light emitting layer and the like on a sapphire substrate (refer to, for example, JP-A HWI 6-151966 (Patent Document 4)).
However, because sapphire, which is used as a material for the substrate of a Group III nitride semiconductor device, has electrical insulating properties, the material has for example the problem that it is not easy to obtain Group III nitride LEDs having high breakdown voltage properties against static electricity and the like. However, because sapphire does not have high thermal conductivity, it has been difficult to fabricate field-effect transistors (hereinafter abbreviated as “FETs”) of low loss in which the heat radiating properties of a substrate are utilized. If a silicon carbide bulk single crystal that has electrical conductivity and excellent thermal conductivity is used as a substrate, this is convenient for forming FETS having excellent breakdown voltage properties against static electricity and the like and FETs having excellent heat radiating properties. However, a silicon carbide bulk single crystal having a diameter that is appropriately large for use in a substrate is expensive and this is unfavorable for the manufacture of consumer Group III nitride semiconductor devices.
On the other hand, a silicon single crystal (hereinafter sometimes referred to as “silicon”) inherently has high thermal conductivity and besides large-diameter single crystals having high electric conductivity have already been mass produced. Therefore, if silicon having high conductivity and a large diameter is used as a substrate, it is expected that, for example, inexpensive consumer LEDs having high breakdown voltage properties against static electricity and the like can be put into practical use. Furthermore, if silicon that has a high thermal conductivity in spite of high resistance is used in a substrate, it is expected that low-loss FETs for high-frequency band communication can be realized. However, the lattice constant (=a) of a silicon single crystal is 0.543 nm and the a-axis lattice constant of a Group III nitride semiconductor, for example, of hexagonal GaN is 0.319 nm. Therefore, a large lattice mismatch exists between the two materials. The mismatch is also large between cubic GaN (a=0.451 nm) and a silicon single crystal. For this reason, a silicon single crystal has the disadvantage that it is difficult to stably form a superior-quality Group III nitride semiconductor layer having few crystal defects on a silicon single crystal substrate.
It is according to conventional arts that in providing a Group III nitride semiconductor layer on a single crystal substrate having a large lattice mismatch, a buffer layer for reducing the lattice mismatch between the two is provided. In conventional arts, a buffer layer is formed from Group III nitride semiconductor materials of, for example, AlN and GaN (refer to, for example, JP-A HEI 6-314659 (Patent Document 5)). However, the mismatch between a silicon single crystal and cubic or hexagonal AlN or GaN is large, and lattice strains cannot be sufficiently relieved. For this reason, if a Group III nitride semiconductor layer is formed by using a buffer layer composed of a conventional Group III nitride semiconductor material, it is impossible to stably form a Group III nitride semiconductor layer excellent in crystallinity, thereby posing a problem.
Also, there has been known a conventional art that involves, in the formation of a Group III nitride semiconductor layer on a silicon single crystal as a substrate, forming a Group III nitride semiconductor layer via a thin film layer of cubic 3C-type silicon carbide (3C—SiC) (refer to, for example, T. Kikuchi et al., Journal of Crystal Growth (J. Crystal Growth), the Netherlands, 2005, Vol. 171, No. 1-2, page e1215 to page e1221 (Non-patent Document 2)). However, this technique has the disadvantage that depending on the properties of a 3C—SiC thin film layer, the crystallinity and the like of a Group III nitride semiconductor layer, which is an upper layer of the 3C—SiC thin film layer, change remarkably, with the result that it is impossible to stably form a superior Group III nitride semiconductor layer. Also, this technique poses the problem that even when a buffer layer composed of SiC is used, a Group III nitride semiconductor layer formed thereon cannot always be excellent in surface flatness.
Single crystals excellent in electrical conductivity and heat radiating properties have already been mass produced. In order to obtain a semiconductor device that is excellent in optical and electrical properties and uses a silicon single crystal as a substrate, it is necessary to use a buffer layer that is configured to advantageously reduce a lattice mismatch with a substrate and to be able to lead to the formation of a good-quality Group III nitride semiconductor layer. For example, even when an SiC layer is used as a buffer layer in forming a Group III nitride semiconductor layer on a silicon single crystal substrate, it is necessary to use an SiC buffer layer that is configured to be able to advantageously reduce a lattice mismatch between the two materials.
Furthermore, in addition to the use of an SiC buffer layer that is configured to be effective in reducing a lattice mismatch, it is necessary to produce an original idea in a stacked structure above the buffer layer that leads to the formation of a good-quality Group III nitride semiconductor layer excellent in surface flatness as well as in crystallinity. Also, in order to manufacture a semiconductor device having excellent properties, it is necessary to use a manufacturing method for leading to stably forming the SiC buffer layer and the good-quality Group III nitride semiconductor layer excellent in surface flatness.
The object of the present invention is to provide a semiconductor device having a buffer layer capable of advantageously reducing a lattice mismatch with a substrate.
Another object of the present invention is to provide a high-performance semiconductor device that leads to the formation of a good-quality Group III nitride semiconductor layer excellent in crystallinity and surface flatness.
Still another object of the present invention is to provide a method of manufacturing a semiconductor device capable of stably fabricating an SiC buffer layer that effectively reduces a lattice mismatch and a superior-quality Group III nitride semiconductor layer excellent in surface flatness.